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Academic background
  1. Doctor of Philosophy (Ph.D.),
    Electrical Engineering Department,
  2. Indian Institute of Technology Bombay.
    Ph.D. Thesis: Design and development of low-power and low-noise analog signal conditioning integrated circuits
    From July, 2012 to June, 2017

  3. Master of Technology (M.Tech)
    Instrument Design and Development Centre,
  4. Indian Institute of Technology Delhi.
    From July, 2008 to May, 2010

  5. Bachelor of Engineering (B.E)
    Department of Instrumentation and Control Engg.,
  6. Dharmsinh Desai University.
    From October, 2002 to May, 2006

Awards and Honours
  1. TCS fellowship through VLSI Design Lab, IIT Bombay. (September 2016 - May 2017)
  2. Research sponsorship from Ministry of Electronics and Information Technology(MeitY), Govt. of India.(July 2012- August 2016)
  3. Scholarship from Ministry of Human Resource Development (MHRD), Govt. of India for post-graduate studies.(2008-2010)
  4. Grant-in-aid sponsorship from Govt. of Gujarat, India for under-graduate studies.(2002-2006)
Work experience
  1. Siemens
  2. General Electric
    • GE Oil & Gas,

    • Design Engineer(Instrumentation)
      From June, 2010 to July, 2012

  3. ABB
  4. Larsen & Toubro Limited
    • L&T ECC,

    • Graduate Engineer Trainee(Instrumentation) / Sr. Engineer
      From July, 2006 to December, 2007